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Journal Publications


  1. En-Hao Chang, Chen-Chieh Wang, Chien-Te Liu, Kuan-Chung Chen and Chung-Ho Chen, Virtualization Technology for TCP/IP Offload Engine, IEEE Transactions on Cloud Computing, February 2014. (Accepted) (SCI, EI)
  2. Chen-Chieh Wang and Chung-Ho Chen, A System‐Level Network Virtual Platform for IPsec Processor Development, IEICE Transactions on Information and Systems, Vol.E96-D, No.5, pp.1095-1104, May 2013. (SCI, EI)
  3. Yi-Ying Tsai and Chung-Ho Chen, Energy-efficient Trace Reuse Cache for Embedded Processor, IEEE Transactions on Very Large Scale Integration Systems, Vol. 19, No. 9, pp. 1681-1694, September 2011. (SCI, EI)
  4. Tai-Hua Lu, Chung-Ho Chen, and Kuen-Jong Lee, Effective Hybrid Test Program Development for Software-Based Self-Testing of Pipeline Processor Cores, IEEE Transactions on Very Large Scale Integration Systems, Vol. 19, No. 3, pp. 516-520, March 2011. (SCI, EI)
  5. Wei-Cheng Lin and Chung-Ho Chen, Frame Buffer Access Reduction for MPEG Video Decoder, IEEE Transactions on Circuits and Systems for Video Technology, Vol. 18, No. 10, pp. 1452-1456, October 2008. (SCI, EI)
  6. Chung-Ming Chen and Chung-Ho Chen, Configurable VLSI Architecture for Deblocking Filter in H.264/AVC, IEEE Transactions on Very Large Scale Integration Systems, Vol. 16, No. 8, pp. 1072-1082, August 2008. (SCI, EI)
  7. Chung-Ming Chen and Chung-Ho Chen, Window Architecture for Deblocking Filter in H.264/AVC, International Journal of Innovative Computing, Information and Control, Vol. 3, No. 6, pp. 1677-1695, December 2007. (SCI, EI)
  8. Chung-Ho Chen and Kuo-Su Hsiao, Scalable Dynamic Instruction Scheduler through Wakeup Spatial Locality, IEEE Transactions on Computers, Vol. 56, No. 11, pp. 1534-1548, November 2007. (SCI, EI)
  9. Chung-Ho Chen, Chao-Hsien Hsu, and Chen-Chieh Wang, Scalable IPv6 Lookup/Update Design for High-Throughput Routers, Journal of Internet Technology, Vol. 8, No. 3, pp. 261-269, July 2007. (EI)
  10. Chung-Ho Chen, Chih-Kai Wei, Tai-Hua Lu, and Hsun-Wei Gao, Software-Based Self-Testing with Multiple-Level Abstractions for Soft Processor Cores, IEEE Transactions on Very Large Scale Integration Systems, Vol. 15, No. 5, pp. 505-517, May 2007. (SCI, EI)
  11. Chung-Ming Chen and Chung-Ho Chen, An Efficient Pipeline Architecture for Deblocking Filter in H.264/AVC, IEICE Transactions on Information and Systems, Vol. E90-D, No.1 pp.99-107, January 2007. (SCI, EI)
  12. Kuo-Su Hsiao and Chung-Ho Chen, Wake-Up Logic Optimizations Through Selective Match and Wakeup Range Limitation, IEEE Transactions on Very Large Scale Integration Systems, Vol. 14, No. 10, pp. 1089-1102, October 2006. (SCI, EI)
  13. M.-D. Shieh, M.-H. Sheu, C.-H. Chen , and H.-F. Lo, A Systematic Approach for Parallel CRC Computations, Journal of Information Science and Engineering, Vol. 17, No. 3, pp. 445-461, May 2001. (SCI)
  14. C.-H. Chen and Akida Wu, Address Prediction Using a Bit-Matrix Indexing Scheme for Selective Update, Journal of Computers, Vol. 12 No.3, September 2000.
  15. C.-H. Chen and Akida Wu, Performance Evaluation of Load/Store Issue and Memory Access Policies, Journal of the Chinese Institute of Engineers, Vol.23, No. 6, pp. 697-709, 2000. (SCI, EI)
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research/publication.1403978381.txt.gz · 上一次變更: 2014/11/10 02:36 (外部編輯)