計算機架構與系統實驗室

Computer Architecture and System Laboratory

edu_project:cpucourse

這是本文件的舊版！

教育部CPU課程計畫

課程資訊

Instructor	Prof. Chung-Ho Chen ( 陳中和教授 ) 92625R EE Department Building chchenmail.ncku.edu.tw
TA	徐鏞、謝宛珊、許冠傑、齊元
TA email	csh01279@gmail.com (徐鏞) jimbochi47@gmail.com (齊元) vanaheim.wen@gmail.com (謝宛珊) jk78346@gmail.com (許冠傑)

講義與實驗教材下載

如果需要投影片密碼請寄信聯絡陳中和老師
LAB 01：Get to know the whole MIPS and C2A
LAB 02: Find out how to translate the C code to Assembly code
LAB 03: SystemC Implementation Of Instruction Function
LAB 04: Verilog Implementation Of Instruction Function
LAB 05: Verilog Implementation Of Arithmetic Logic Unit
LAB 06: Verilog Implementation Of I-Cache
LAB 07: Set-Associative D-cache
LAB 08: Introduction to a simple CPU system platform & Memory Allocation
LAB 09: Introduction to a simple Multi-Master Bus Platform & Generic I/ Os
LAB 10: Introduction to Interrupt Controller & Interrupt Service Routines on EASY Platform
LAB01-10(Files and Solutions)

edu_project/cpucourse.1412315163.txt.gz · 上一次變更: 2014/11/10 02:36 (外部編輯)