差異處

這裏顯示兩個版本的差異處。

--- research:publication [2015/03/14 18:13]
jay
+++ research:publication [2018/04/17 13:26] (目前版本)
admin
@@ 行 4: / 行 4: @@
   data: {
     columns: [
-      ['IEEE/ACM Transactions Paper',    0, 0, 1, 2, 2, 0, 0, 2, 0, 0, 1],
+      ['IEEE/ACM Transactions Paper',    0, 0, 1, 2, 2, 0, 0, 2, 0, 0, 1, 0, 0, 1, 1],
-      ['Other Journal Paper',            0, 0, 0, 3, 0, 0, 0, 0, 0, 1, 0],
+      ['Other Journal Paper',            0, 0, 0, 3, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0],
-      ['International Conference Paper', 2, 6, 6, 3, 6, 2, 2, 1, 2, 2, 1],
+      ['International Conference Paper', 2, 6, 6, 3, 6, 2, 2, 1, 2, 2, 3, 3, 2, 1, 0],
     ],
     type: 'bar',
@@ 行 13: / 行 13: @@
     x: {
       type: 'category',
-      categories: ['2004', '2005', '2006', '2007', '2008', '2009', '2010', '2011', '2012', '2013', '2014'],
+      categories: ['2004', '2005', '2006', '2007', '2008', '2009', '2010', '2011', '2012', '2013', '2014','2015','2016', '2017', '2018'],
     },
     y: {
@@ 行 30: / 行 30: @@
 ===== 期刊論文發表 =====
+  - __[[Member:edi|Kuan-Chung Chen]]__ and __[[Member:Advisor|Chung-Ho Chen]]__, \\ {{research:caslab_2018_jnl_01.pdf|Enabling SIMT Execution Model on Homogeneous Multi-Core System}}, \\ //ACM Transactions on Architecture and Code Optimization//, \\ Volume 15 Issue 1, April 2018 \\ Article No. 6  \\ \\
+  - __[[Member:klio|Ching-Wen Lin]]__ and __[[Member:Advisor|Chung-Ho Chen]]__, \\ {{research:caslab_2017_jnl_01.pdf|A Processor and Cache Online Self-Testing Methodology for OS-Managed Platform}}, \\ //IEEE Transactions on Very Large Scale Integration (VLSI) Systems//, \\ Vol. 25, No. 8, pp. 2346-2359, August 2017. \\ \\
   - __En-Hao Chang__, __[[Member:jay|Chen-Chieh Wang]]__, __Chien-Te Liu__, __[[Member:edi|Kuan-Chung Chen]]__ and __[[Member:Advisor|Chung-Ho Chen]]__, \\ {{research:caslab_2014_jnl_01.pdf|Virtualization Technology for TCP/IP Offload Engine}}, \\ //IEEE Transactions on Cloud Computing//, \\ Vol. 2, No. 2, April-June 2014. **(SCI, EI)** \\ \\
   - __[[Member:jay|Chen-Chieh Wang]]__ and __[[Member:Advisor|Chung-Ho Chen]]__, \\ {{research:caslab_2013_jnl_01.pdf|A System‐Level Network Virtual Platform for IPsec Processor Development}}, \\ //IEICE Transactions on Information and Systems//, \\ Vol.E96-D, No.5, pp.1095-1104, May 2013. **(SCI, EI)**  \\ \\
@@ 行 48: / 行 50: @@
 \\
 ===== 會議論文發表 =====
+  - J.-W. Lin , and ____[[Member:Advisor|Chung-Ho Chen]]____,\\ {{research:caslab_2017_cnf_01.pdf|  Processor Shield for L1 Data Cache Software-Based On-line Self-testing}}, \\ //in Asia South Pacific Des. Autom. Conf.//  , \\ January 16-19, 2017, Japan \\ \\
+  - J.-W. Lin , and ____[[Member:Advisor|Chung-Ho Chen]]____,\\ {{research:caslab_2016_cnf_02.pdf| A Processor Shield for Software-Based On-Line Self-Test}}, \\ //in IEEE Asia Pacific Conf. Circuits and Systems//, \\ October 25-28, 2016, Korea \\ \\
+  - Yun-Chi Huang, Kuan-Chieh Hsu, Wan-shan Hsieh, Chen-Chieh Wang, Chia-Han Lu, and __[[Member:Advisor|Chung-Ho Chen]]___,\\ {{research:caslab_2016_cnf_01.pdf|Dynamic SIMD Re-convergence with Paired-Path Comparison }}  , \\ //in the 2016 IEEE International Symposium on Circuits and Systems (ISCAS)//, \\ May 23-25, 2016, Montreal, Canada. \\ \\
+  - Yung Hsu and __ __[[Member:Advisor|Chung-Ho Chen]]____, \\ {{research:caslab_2015_cnf_02.pdf|A Heterogeneous System Architecture Conformed GPU Platform Supporting OpenCL and OpenGL}}, \\ //Taiwan and Japan Conference on Circuits and Systems (TJCAS)//, \\ Aug. 18-23, 2015, Japan \\ \\
+  - Heng-Yi Chen,__ __ and __[[Member:Advisor|Chung-Ho Chen]]__, \\ {{|An HSAIL ISA Conformed GPU Platform}}, \\ //In International Conference on Innovation, Communication and Engineering (ICICE)//, \\  Oct 23-28. 2015. Xiangtan, Hunan, P.R. China\\ \\
+  - Chien-Hsuan Yen, Kuan-Chung Chen and __[[Member:Advisor|Chung-Ho Chen]]__, \\ {{research:caslab_2015_cnf_01.pdf|A memory-efficient NoC system for OpenCL many-core platform}}, \\ //in the 2015 IEEE International Symposium on Circuits and Systems (ISCAS)//, \\ May 24-27, 2015, Lisbon, Portugal. \\ \\
+  - Ching-Wen Lin and __[[Member:Advisor|Chung-Ho Chen]]__, \\ {{research:caslab_2014_cnf_02.pdf|Unambiguous I-cache testing using software-based self-testing methodology}}, \\ //in the 2014 IEEE International Symposium on Circuits and Systems (ISCAS)//, \\ June 1-5, 2014 ,Melbourne VIC, Australian. \\ \\
+  - Kuan-Chung Chen and __[[Member:Advisor|Chung-Ho Chen]]__, \\ {{research:caslab_2014_cnf_03.pdf|An OpenCL Runtime System for a Heterogeneous many-Core Virtual Platform }}, \\ //in the 2014 IEEE International Symposium on Circuits and Systems (ISCAS)//, \\ June 1-5, 2014 ,Melbourne VIC, Australian. \\ \\
   - __[[en:member:elvis|Jhe-Yu Liou]]__ and __[[Member:Advisor|Chung-Ho Chen]]__, \\ {{research:caslab_2014_cnf_01.pdf|Re-visit Blocking Texture Cache Design for Modern GPU}}, \\ //in the 11th International SoC Design Conference (ISOCC)//, \\ Nov. 3-6, 2014, Jeju, Korea. \\ \\
   - Tzu-Hsuan Hsu, Ching-Wen Lin and __[[Member:Advisor|Chung-Ho Chen]]__, \\ {{research:caslab_2013_cnf_02.pdf|Using Condition Flag Prediction to Improve the Performance of Out-of-Order Processors}}, \\ //in the IEEE International Symposium on Circuits and Systems (ISCAS)//, \\ May 19-23, 2013 ,Beijing, China. \\ \\

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