計算機架構與系統實驗室

Computer Architecture and System Laboratory

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member:jay [2014/11/23 09:11]
jay [Publication] 		member:jay [2017/10/22 15:55] (目前版本)
jay [Chen-Chieh Wang (王振傑)]
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 {{:member:jay:jay_photo_2014.jpg|}} {{:member:jay:jay_photo_2014.jpg|}}
  
-**Chen-Chieh Wang** received the M.S. and Ph.D. degrees, both in computer and communication engineering from the National Cheng-Kung University, Tainan, Taiwan, in 2005 and 2013, respectively. From 2008 to 2011, he was an adjunct instructor with Department of Electrical Engineering, Feng-Chia University, Taichung, Taiwan. He is currently an R&D engineer at Information and Communications Research Laboratories (ICL), Industrial Technology Research Institute (ITRI), Hsinchu, Taiwan. His research interests include computer architecture, computer network, network security, heterogeneous system architecture (HSA), and electronic system level (ESL) design.+**Chen-Chieh (Jay) Wang** received the M.S. and Ph.D. degrees, both in computer and communication engineering from the National Cheng-Kung University, Tainan, Taiwan, in 2005 and 2013, respectively. From 2008 to 2011, he was an adjunct instructor with Department of Electrical Engineering, Feng-Chia University, Taichung, Taiwan. From 2013 to 2017, he was an R&D engineer at Information and Communications Research Laboratories (ICL), Industrial Technology Research Institute (ITRI), Hsinchu, Taiwan. He is currently an senior engineer at MediaTek, Hsinchu, Taiwan. His research interests include computer architecture, computer network, network security, heterogeneous system architecture (HSA), and electronic system level (ESL) design.
 \\  \\ 
 \\  \\ 
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 ====== Publication ====== ====== Publication ======
 +----
  
-**◎ Book**+==== ◎ Book ====
   * TCP/IP 通訊協定 ( 第三版 )，陳中和 、__王振傑__譯。\\ The McGraw-Hill Companies Inc.,\\ ISBN-13: 978-986-157-321-2, Nov. 2006.\\    * TCP/IP 通訊協定 ( 第三版 )，陳中和 、__王振傑__譯。\\ The McGraw-Hill Companies Inc.,\\ ISBN-13: 978-986-157-321-2, Nov. 2006.\\ 
  
-**◎ Journal Paper**+==== ◎ Journal Paper ====
   - En-Hao Chang, __Chen-Chieh Wang__, Chien-Te Liu, Kuan-Chung Chen, and Chung-Ho Chen,\\ **{{research:caslab_2014_jnl_01.pdf|Virtualization Technology for TCP/IP Offload Engine}}**,\\ //IEEE Transactions on Cloud Computing//,\\ Vol. 2, No. 2, April-June 2014.\\ \\     - En-Hao Chang, __Chen-Chieh Wang__, Chien-Te Liu, Kuan-Chung Chen, and Chung-Ho Chen,\\ **{{research:caslab_2014_jnl_01.pdf|Virtualization Technology for TCP/IP Offload Engine}}**,\\ //IEEE Transactions on Cloud Computing//,\\ Vol. 2, No. 2, April-June 2014.\\ \\  
   - __Chen‐Chieh Wang__ and Chung‐Ho Chen,\\ **{{research:caslab_2013_jnl_01.pdf|A System‐Level Network Virtual Platform for IPsec Processor Development}}**,\\ //IEICE Transactions on Information and Systems//,\\ Vol.E96-D, No.5, pp.1095-1104, May 2013.\\ \\    - __Chen‐Chieh Wang__ and Chung‐Ho Chen,\\ **{{research:caslab_2013_jnl_01.pdf|A System‐Level Network Virtual Platform for IPsec Processor Development}}**,\\ //IEICE Transactions on Information and Systems//,\\ Vol.E96-D, No.5, pp.1095-1104, May 2013.\\ \\ 
   - Chung-Ho Chen, Chao-Hsien Hsu, and __Chen-Chieh Wang__,\\ **{{research:caslab_2007_jnl_03.pdf|Scalable IPv6 Lookup/Update Design for High-Throughput Routers}}**,\\ //Journal of Internet Technology//,\\ Vol. 8, No. 3, pp. 261-269, July 2007.\\   - Chung-Ho Chen, Chao-Hsien Hsu, and __Chen-Chieh Wang__,\\ **{{research:caslab_2007_jnl_03.pdf|Scalable IPv6 Lookup/Update Design for High-Throughput Routers}}**,\\ //Journal of Internet Technology//,\\ Vol. 8, No. 3, pp. 261-269, July 2007.\\
  
-**◎ Conference Paper**+==== ◎ Conference Paper ==== 
 +  -  Yun-Chi Huang, Kuan-Chieh Hsu, Wan-shan Hsieh, __Chen-Chieh Wang__, Chia-Han Lu, and Chung-Ho Chen, \\ **{{research:caslab_2016_cnf_01.pdf|Dynamic SIMD Re-convergence with Paired-Path Comparison }}**, \\ in the 2016 //IEEE International Symposium on Circuits and Systems (ISCAS)//, \\ May 23-25, 2016, Montreal, Canada. \\ \\
   -  __Chen-Chieh Wang__, Sheng-Hsin Lo, Yao-Ning Liu, and Chung-Ho Chen,\\ **{{research:caslab_2012_cnf_02.pdf|NetVP: A System-Level NETwork Virtual Platform for Network Accelerator Development}}**,\\ in the //IEEE International Symposium on Circuits and Systems (ISCAS)//,\\ May 20-23, 2012, Seoul, Korea.\\ \\    -  __Chen-Chieh Wang__, Sheng-Hsin Lo, Yao-Ning Liu, and Chung-Ho Chen,\\ **{{research:caslab_2012_cnf_02.pdf|NetVP: A System-Level NETwork Virtual Platform for Network Accelerator Development}}**,\\ in the //IEEE International Symposium on Circuits and Systems (ISCAS)//,\\ May 20-23, 2012, Seoul, Korea.\\ \\ 
   - __Chen-Chieh Wang__ and Chung-Ho Chen,\\ **An Optimized Cryptographic Processing Unit for IPsec Processors**,\\ in the //26th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC)//, June 19-22, 2011, Gyeongju, Korea.\\ \\    - __Chen-Chieh Wang__ and Chung-Ho Chen,\\ **An Optimized Cryptographic Processing Unit for IPsec Processors**,\\ in the //26th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC)//, June 19-22, 2011, Gyeongju, Korea.\\ \\ 
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   - __Chen-Chieh Wang__, Ro-Pun Wong, Jing-Wun Lin, and Chung-Ho Chen],\\ **{{research:caslab_2009_cnf_01.pdf|System-Level Development and Verification Framework for High-Performance System Accelerator}}**,\\ in the //IEEE International Symposium on VLSI Design, Automation & Test (VLSI-DAT)//,\\ April 27-30, 2009, Hsinchu, Taiwan.\\   - __Chen-Chieh Wang__, Ro-Pun Wong, Jing-Wun Lin, and Chung-Ho Chen],\\ **{{research:caslab_2009_cnf_01.pdf|System-Level Development and Verification Framework for High-Performance System Accelerator}}**,\\ in the //IEEE International Symposium on VLSI Design, Automation & Test (VLSI-DAT)//,\\ April 27-30, 2009, Hsinchu, Taiwan.\\
  
-**◎ PhD Dissertation**+==== ◎ PhD Dissertation ====
   * A Dataflow-based Cryptographic Processing Unit for High-Throughput IPsec Processors\\  高速網路密碼處理器之資料流架構設計\\   * A Dataflow-based Cryptographic Processing Unit for High-Throughput IPsec Processors\\  高速網路密碼處理器之資料流架構設計\\
  
-**◎ MS Thesis**+==== ◎ MS Thesis ====
   * Design and Implementation of a Dual-ISA Embedded Microprocessor\\ 雙指令集架構之嵌入式微處理器的設計與實作\\   * Design and Implementation of a Dual-ISA Embedded Microprocessor\\ 雙指令集架構之嵌入式微處理器的設計與實作\\
  
 \\ \\
  
-====== Presentations ====== +====== Presentation ====== 
-\\+---- 
 \\ \\
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 ====== Teaching Experience ====== ====== Teaching Experience ======
 +----
 +==== ◎ Computer Organization and Architecture ====
  
-**◎ Computer Organization and Architecture** 
  
 **Year**: \\  **Year**: \\ 
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 |Jan. 17|Final| |Jan. 17|Final|
 \\ \\
-\\ +==== ◎ Systems Programming and Operating Systems ====
-**◎ Systems Programming and Operating Systems** +
 **Year**: \\  **Year**: \\ 
 Spring 2008, 2009, 2010 Spring 2008, 2009, 2010
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 |Jun. 14|OS：Virtual Memory             | | |Jun. 14|OS：Virtual Memory             | |
 |Jun. 21|Final                          | | |Jun. 21|Final                          | |
 +
 +\\
 +\\
 +====== e-Learning ======
 +----
 +==== UC Berkeley ====
 +
 +  * Webcast.Berkeley [[http://webcast.berkeley.edu/|Website]]
 +  * Introduction to Embedded Systems, Edward A. Lee, Fall 2014  [[http://chess.eecs.berkeley.edu/eecs149/lectures/index.html|Slides]]  [[http://webcast.berkeley.edu/playlist#c,d,Electrical_Engineering,-XXv-cvA_iDq3FCoYLeUL-X-NUlT405n|Video]] 
 +
 +==== Carnegie Mellon University ====
 +  * Computer Architecture, Prof. Onur Mutlu, Fall 2013 [[http://www.ece.cmu.edu/~ece740/f13/doku.php?id=schedule|Slides & Video]] 
 +
member/jay.1416733870.txt.gz · 上一次變更: 2014/11/23 09:11 由 jay

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