這裏顯示兩個版本的差異處。
Both sides previous revision 前次修改 下次修改 | 前次修改 下次修改 Both sides next revision | ||
group:gpu [2014/11/22 15:26] elvis |
group:gpu [2019/09/24 07:17] admin |
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<WRAP round todo> // | <WRAP round todo> // | ||
- | ====== | + | ====== |
+ | GPGPU提供可大量平行化(Massive Parallel)的編程模型(Programming Model),讓易於平行化的應用程式能獲能效能上的躍進,而在硬體架構方面,GPGPU的運算單元為SIMT架構,相較於MIMD架構的處理器,SIMT架構因資料流的單調性更能在相同製程條件下提供遠大於MIMD的運算單元數量,在運算效能極限(Peak Performance)方面佔有絕對優勢。 | ||
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(Unified Shader GPU Architecture based on HSA) | (Unified Shader GPU Architecture based on HSA) | ||
- | 隨著GPU技術的進步與繪圖效能的提升,視覺運算領域正快速的發展。使用GPU來做大量平行處理的通用運算GPU(General Purpose GPU),以及整合CPU與GPU的異質性系統,不但大幅提升了運算效能,更是研究的趨勢之一。HSA Foundation所提出的異質運算系統架構(Heterogeneous System Architecture),便希望整合CPU與GPU的架構,進一步提升整個系統運算的效能。 | + | 隨著GPU技術的進步與繪圖效能的提升,視覺運算領域正快速的發展。使用GPU來做大量平行處理的通用運算GPU(GPGPU - General Purpose GPU),以及整合CPU與GPU的異質性系統,不但大幅提升了運算效能,更是研究的趨勢之一。[[http:// |
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=== 異質系統架構 === | === 異質系統架構 === | ||
- | **1. HSA Immediate Language** | + | |
- | \\ HSA introduced a low-level intermediate language, which is portable across multiple platforms. | + | - **HSA Immediate Language** \\ HSA introduced a low-level intermediate language, which is portable across multiple platforms. |
- | \\ **2. hetergeneous | + | |
- | \\ Unified Memory Address Space reduces memory bandwidth between CPU and GPU to improve performance. | + | |
- | \\ **3. hetergeneous | + | |
- | \\ GPU and CPU have equal flexibility to create and dispatch work items which reduces dispatch latency to GPU. | + | |
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===== 研究成果 ===== | ===== 研究成果 ===== | ||
- | + | < | |
- | 為了研究並且模擬異質系統架構的運算,我們實作了一個基於異質系統架構(HSA)的GPU模擬器 | + | 為了研究並且模擬異質系統架構的運算,我們實作了一個基於異質系統架構(HSA)的GPU模擬器。此模擬器包含: |
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- | 此模擬器包含: | + | - **Custom GPU ISA** \\ Which is based on the HSAIL BRIG and Nvidia PTX Virtual ISA |
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- | \\ **1. Custom GPU ISA** | + | |
- | \\ Which is based on the HSAIL BRIG and Nvidia PTX Virtual ISA | + | |
- | \\ **2. HSAIL to HSA Binary Translator** | + | A fundamental GPU Simulator based on our Custom GPU ISA which includes fixed-size register file, warp scheduler, dispatch unit and SIMD execution units for parallel computing. The Simulator also supports 80 of 110 (73%) instructions, |
- | \\ **3. GPU Simulator** | + | |
- | \\ A fundamental GPU Simulator based on our Custom GPU ISA which includes fixed-size register file, warp scheduler, dispatch unit and SIMD execution units for parallel computing. The Simulator also supports 80 of 110 (73%) instructions, | + | |
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===== 團隊成員 ===== | ===== 團隊成員 ===== | ||
==== 現任成員 ==== | ==== 現任成員 ==== | ||
- | + | ^ 碩士班二年級 | |
- | ^ 研究助理 | + | ^ 碩士班一年級 |
- | ^ 碩士班三年級 | + | |
- | ^ 碩士班二年級 | + | |
- | ^ 碩士班一年級 | + | |
^ 大學部 | ^ 大學部 | ||
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===== 外部連結 ===== | ===== 外部連結 ===== | ||
- | 1. [[http:// | + | - [[http:// |