計算機架構與系統實驗室

Computer Architecture and System Laboratory

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en:edu_project:cpucourse

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Next revision 		Previous revision
en:edu_project:cpucourse [2014/10/08 06:08]
elvis created 		en:edu_project:cpucourse [2014/11/22 15:35] (current)
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-FIXME **This page is not fully translated, yet. Please help completing the translation.**\\ //(remove this paragraph once the translation is finished)// 
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 ~~NOTOC~~ ~~NOTOC~~
  
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 \\ \\
 ===== Course information ====== ===== Course information ======
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-^ Instructor  |[[member:advisor|陳中和]]  教授 |+^ Instructor  |[[en:member:advisor|Prof. Chung-Ho Chen]] |
 ^  \\ TA  | 徐　鏞<csh01279@gmail.com> \\ 齊　元<jimbochi47@gmail.com> \\ 謝宛珊<vanaheim.wen@gmail.com> \\ 許冠傑<jk78346@gmail.com> | ^  \\ TA  | 徐　鏞<csh01279@gmail.com> \\ 齊　元<jimbochi47@gmail.com> \\ 謝宛珊<vanaheim.wen@gmail.com> \\ 許冠傑<jk78346@gmail.com> |
  
 \\ \\
 ===== Lecture and Material ===== ===== Lecture and Material =====
----- +<wrap hi info> If you need pdf password, please contact |[[en:member:advisor|Prof. Chung-Ho Chen]]</wrap>  
-<wrap hi info> 如果需要投影片密碼請寄信聯絡[[member:advisor|陳中和老師]]</wrap> \\ +  * {{:edu_project:cpulab_1.pdf |LAB 01：Get to know the whole MIPS and C2A}} 
-  * {{:edu_project:cpulab_1.pdf |LAB 01：Get to know the whole MIPS and C2A}} \\ +  * {{:edu_project:cpulab_2.pdf |LAB 02: Find out how to translate the C code to Assembly code}} 
-  * {{:edu_project:cpulab_2.pdf |LAB 02: Find out how to translate the C code to Assembly code}} \\ +  * {{:edu_project:cpulab_3.pdf |LAB 03: SystemC Implementation Of Instruction Function}} 
-  * {{:edu_project:cpulab_3.pdf |LAB 03: SystemC Implementation Of Instruction Function}} \\ +  * {{:edu_project:cpulab_4.pdf |LAB 04: Verilog Implementation Of Instruction Function}} 
-  * {{:edu_project:cpulab_4.pdf |LAB 04: Verilog Implementation Of Instruction Function}} \\ +  * {{:edu_project:cpulab_5.pdf |LAB 05: Verilog Implementation Of Arithmetic Logic Unit}} 
-  * {{:edu_project:cpulab_5.pdf |LAB 05: Verilog Implementation Of Arithmetic Logic Unit}} \\ +  * {{:edu_project:cpulab_6.pdf |LAB 06: Verilog Implementation Of I-Cache}} 
-  * {{:edu_project:cpulab_6.pdf |LAB 06: Verilog Implementation Of I-Cache}} \\ +  * {{:edu_project:cpulab_7.pdf |LAB 07: Set-Associative D-cache}} 
-  * {{:edu_project:cpulab_7.pdf |LAB 07: Set-Associative D-cache}} \\ +  * {{:edu_project:cpulab_8.pdf |LAB 08: Introduction to a simple CPU system platform & Memory Allocation}} 
-  * {{:edu_project:cpulab_8.pdf |LAB 08: Introduction to a simple CPU system platform & Memory Allocation}} \\ +  * {{:edu_project:cpulab_9.pdf |LAB 09: Introduction to a simple Multi-Master Bus Platform & Generic I/ Os}} 
-  * {{:edu_project:cpulab_9.pdf |LAB 09: Introduction to a simple Multi-Master Bus Platform & Generic I/ Os}} \\ +  * {{:edu_project:cpulab_10.pdf |LAB 10: Introduction to Interrupt Controller & Interrupt Service Routines on EASY Platform}} 
-  * {{:edu_project:cpulab_10.pdf |LAB 10: Introduction to Interrupt Controller & Interrupt Service Routines on EASY Platform}} \\ +  * {{:edu_project:cpulab_solution.rar|LAB01-10(Files and Solutions)}}
-  * {{:edu_project:cpulab_solution.rar|LAB01-10(Files and Solutions)}} \\+
  
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en/edu_project/cpucourse.1412748521.txt.gz · Last modified: 2014/11/10 02:36 (external edit)

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