計算機架構與系統實驗室

Computer Architecture and System Laboratory

使用者工具

網站工具


course:logic_system_practice:111

差異處

這裏顯示兩個版本的差異處。

連向這個比對檢視

Both sides previous revision 前次修改
course:logic_system_practice:111 [2023/05/22 16:01]
admin [實驗課講義下載]
course:logic_system_practice:111 [2023/05/22 16:02] (目前版本)
admin [實驗課講義下載]
行 25: 行 25:
   * {{ :course:logic_system_practice:02_laboratory-3_vivado_.pdf |Lab 3 - Xilinx Vivado 介紹 & Verilog 簡介}}   * {{ :course:logic_system_practice:02_laboratory-3_vivado_.pdf |Lab 3 - Xilinx Vivado 介紹 & Verilog 簡介}}
   * {{ :course:logic_system_practice:05_laboratory_5_comb.pdf |Lab 4 - Verilog - Combinational Design}}   * {{ :course:logic_system_practice:05_laboratory_5_comb.pdf |Lab 4 - Verilog - Combinational Design}}
-  * {{ :course:logic_system_practice:06_laboratory_6.pdf|Lab 5 - Verilog - Sequential Design(1)}} +  * {{ :course:logic_system_practice:06_laboratory_6.pdf|Lab 5 - Verilog - Sequential Design (1)}} 
-  * {{ :course:logic_system_practice:07_laboratory-7_edit.pdf|Lab 6 - Verilog - Sequential Design(2)}}+  * {{ :course:logic_system_practice:07_laboratory-7_edit.pdf|Lab 6 - Verilog - Sequential Design (2)}}
   * {{ :course:logic_system_practice:07_laboratory-7.pdf |Lab 7 - Pynq 與七段顯示器}}   * {{ :course:logic_system_practice:07_laboratory-7.pdf |Lab 7 - Pynq 與七段顯示器}}
   * {{ :course:logic_system_practice:pynq_usage.pdf |Pynq 操作補充}}   * {{ :course:logic_system_practice:pynq_usage.pdf |Pynq 操作補充}}
course/logic_system_practice/111.txt · 上一次變更: 2023/05/22 16:02 由 admin