EASY Project Status
Project File: fuct.xise Parser Errors: No Errors
Module Name: EASY Implementation State: New
Target Device: xc5vlx110t-1ff1136
  • Errors:
 
Product Version:ISE 13.2
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: System Settings
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
WebTalk ReportCurrent週二 十二月 11 21:37:04 2012
WebTalk Log FileCurrent週二 十二月 11 21:37:10 2012

Date Generated: 12/17/2012 - 09:17:13