====== Chen-Chieh Wang (王振傑) ====== \\ {{:member:jay:jay_photo_2014.jpg|}} **Chen-Chieh (Jay) Wang** received the M.S. and Ph.D. degrees, both in computer and communication engineering from the National Cheng-Kung University, Tainan, Taiwan, in 2005 and 2013, respectively. From 2008 to 2011, he was an adjunct instructor with Department of Electrical Engineering, Feng-Chia University, Taichung, Taiwan. From 2013 to 2017, he was an R&D engineer at Information and Communications Research Laboratories (ICL), Industrial Technology Research Institute (ITRI), Hsinchu, Taiwan. He is currently an senior engineer at MediaTek, Hsinchu, Taiwan. His research interests include computer architecture, computer network, network security, heterogeneous system architecture (HSA), and electronic system level (ESL) design. \\ \\ \\ ====== Publication ====== ---- ==== ◎ Book ==== * TCP/IP 通訊協定 ( 第三版 )，陳中和 、__王振傑__譯。\\ The McGraw-Hill Companies Inc.,\\ ISBN-13: 978-986-157-321-2, Nov. 2006.\\ ==== ◎ Journal Paper ==== - En-Hao Chang, __Chen-Chieh Wang__, Chien-Te Liu, Kuan-Chung Chen, and Chung-Ho Chen,\\ **{{research:caslab_2014_jnl_01.pdf|Virtualization Technology for TCP/IP Offload Engine}}**,\\ //IEEE Transactions on Cloud Computing//,\\ Vol. 2, No. 2, April-June 2014.\\ \\ - __Chen‐Chieh Wang__ and Chung‐Ho Chen,\\ **{{research:caslab_2013_jnl_01.pdf|A System‐Level Network Virtual Platform for IPsec Processor Development}}**,\\ //IEICE Transactions on Information and Systems//,\\ Vol.E96-D, No.5, pp.1095-1104, May 2013.\\ \\ - Chung-Ho Chen, Chao-Hsien Hsu, and __Chen-Chieh Wang__,\\ **{{research:caslab_2007_jnl_03.pdf|Scalable IPv6 Lookup/Update Design for High-Throughput Routers}}**,\\ //Journal of Internet Technology//,\\ Vol. 8, No. 3, pp. 261-269, July 2007.\\ ==== ◎ Conference Paper ==== - Yun-Chi Huang, Kuan-Chieh Hsu, Wan-shan Hsieh, __Chen-Chieh Wang__, Chia-Han Lu, and Chung-Ho Chen, \\ **{{research:caslab_2016_cnf_01.pdf|Dynamic SIMD Re-convergence with Paired-Path Comparison }}**, \\ in the 2016 //IEEE International Symposium on Circuits and Systems (ISCAS)//, \\ May 23-25, 2016, Montreal, Canada. \\ \\ - __Chen-Chieh Wang__, Sheng-Hsin Lo, Yao-Ning Liu, and Chung-Ho Chen,\\ **{{research:caslab_2012_cnf_02.pdf|NetVP: A System-Level NETwork Virtual Platform for Network Accelerator Development}}**,\\ in the //IEEE International Symposium on Circuits and Systems (ISCAS)//,\\ May 20-23, 2012, Seoul, Korea.\\ \\ - __Chen-Chieh Wang__ and Chung-Ho Chen,\\ **An Optimized Cryptographic Processing Unit for IPsec Processors**,\\ in the //26th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC)//, June 19-22, 2011, Gyeongju, Korea.\\ \\ - Jing-Wun Lin, __Chen-Chieh Wang__, Chin-Yao Chang, Chung-Ho Chen, and Kuen-Jong Lee,\\ **{{research:caslab_2009_cnf_02.pdf|Full System Simulation and Verification Framework}}**,\\ in the //Proceedings of the Fifth International Conference on Information Assurance and Security (IAS-2009)//,\\ August 18-20, 2009, Xi'an, China.\\ \\ - __Chen-Chieh Wang__, Ro-Pun Wong, Jing-Wun Lin, and Chung-Ho Chen],\\ **{{research:caslab_2009_cnf_01.pdf|System-Level Development and Verification Framework for High-Performance System Accelerator}}**,\\ in the //IEEE International Symposium on VLSI Design, Automation & Test (VLSI-DAT)//,\\ April 27-30, 2009, Hsinchu, Taiwan.\\ ==== ◎ PhD Dissertation ==== * A Dataflow-based Cryptographic Processing Unit for High-Throughput IPsec Processors\\ 高速網路密碼處理器之資料流架構設計\\ ==== ◎ MS Thesis ==== * Design and Implementation of a Dual-ISA Embedded Microprocessor\\ 雙指令集架構之嵌入式微處理器的設計與實作\\ \\ ====== Presentation ====== ---- \\ \\ \\ ====== Teaching Experience ====== ---- ==== ◎ Computer Organization and Architecture ==== **Year**: \\ Fall 2008, 2009, 2010 **Textbook**：\\ Computer Organization & Design - The Hardware / Software Interface ( 4th Edition ), Patterson & Hennessy **References**：\\ Computer Architecture & Quantitative Approach (4th Edition), Hennessy & Patterson\\ Computer Organization and Architecture (7th Edition), William Stallings\\ [[http://www-inst.eecs.berkeley.edu/~cs61c/fa10/|Great Ideas in Computer Architecture (Machine Structures), UC Berkeley, Fall 2010.]] **Lectures**： ^ Date ^ Lecture Topic ( Fall 2010 ) ^ |Sep. 13|{{:member:jay:course:ca:ca2010_ch01_part1_-_computer_abstractions_and_technology.pdf|Chapter 1：Computer Abstractions and Technology (1/2) - Introduction}} | |Sep. 20|{{:member:jay:course:ca:ca2010_ch01_part2_-_computer_abstractions_and_technology.pdf|Chapter 1：Computer Abstractions and Technology (2/2) - Performance}} | |Sep. 27|{{:member:jay:course:ca:ca2010_ch02_part1_-_instructions_-_language_of_the_computer.pdf|Chapter 2：Instructions - Language of the Computer (1/3) - MIPS ISA}} | |Oct. 4 |{{:member:jay:course:ca:ca2010_ch02_part2_-_instructions_-_language_of_the_computer.pdf|Chapter 2：Instructions - Language of the Computer (2/3) - Procedure Call}} | |Oct. 11|{{:member:jay:course:ca:ca2010_ch02_part3_-_instructions_-_language_of_the_computer.pdf|Chapter 2：Instructions - Language of the Computer (3/3) - ARM & x86}} + Quiz 1| |Oct. 17|{{:member:jay:course:ca:ca2010_ch03_part1_-_arithmetic_for_computers.pdf|Chapter 3：Arithmetic for Computers (1/2)}}| |Oct. 24|{{:member:jay:course:ca:ca2010_ch03_part2_-_arithmetic_for_computers.pdf|Chapter 3：Arithmetic for Computers (2/2)}}| |Nov. 1 |Midterm| |Nov. 8 |{{:member:jay:course:ca:ca2010_ch04_part1_-_the_processor_datapath_.pdf|Chapter 4：The Processor (1/4) - Datapath}}| |Nov. 22|{{:member:jay:course:ca:ca2010_ch04_part2_-_the_processor_multicycle_control_.pdf|Chapter 4：The Processor (2/4) - Mulitcycle & Control}}| |Nov. 29|{{:member:jay:course:ca:ca2010_ch04_part3_-_the_processor_pipelining_.pdf|Chapter 4：The Processor (3/4) - Pipelining}}| |Dec. 6 |{{:member:jay:course:ca:ca2010_ch04_part4_-_the_processor_ilp_.pdf|Chapter 4：The Processor (4/3) - ILP}}| |Dec. 13|{{:member:jay:course:ca:ca2010_ch05_part1_-_large_and_fast_-_exploiting_memory_hierarchy.pdf|Chapter 5：Large and Fast - Exploiting Memory Hierarchy (1/2) - Cache}}| |Dec. 20|{{:member:jay:course:ca:ca2010_ch05_part2_-_large_and_fast_-_exploiting_memory_hierarchy.pdf|Chapter 5：Large and Fast - Exploiting Memory Hierarchy (2/2) - Virtual Memory}} + Quiz 2| |Dec. 27|{{:member:jay:course:ca:ca2010_ch06_-_storage_and_other_io_topics.pdf|Chapter 6：Storage and Other I/O Topics}}| |Jan. 17|Final| \\ ==== ◎ Systems Programming and Operating Systems ==== **Year**: \\ Spring 2008, 2009, 2010 **Textbook**：\\ System Software : An Introduction to Systems Programming (3rd Edition),\\ Leland L. Beck, \\ The Addison Wesley Longman, Inc. \\ ISBN: 0-201-42300-6 **References**：\\ Operating System Concepts (7th Edition), Avi Silberschatz, Peter Baer Galvin, and Greg Gagne\\ Modern Operating Systems (3rd Edition), Tanenbaum\\ [[http://inst.eecs.berkeley.edu/~cs162/fa09/|CS162 : Operating Systems and Systems Programming, UC Berkeley, Fall 2009.]] **Lectures**： ^ Date ^ Lecture Topic ( Spring 2010 ) ^ Download ^ |Mar. 1|SP：Background (1/2) | {{:member:jay:course:sp:sp2010_ch01.pdf|PDF}}| |Mar. 8|SP：Background (2/2) | | |Mar. 15|SP：Assemblers (1/3) | {{:member:jay:course:sp:sp2010_ch02.pdf|PDF}}| |Mar. 22|SP：Assemblers (2/3) | | |Mar. 29|SP：Assemblers (3/3) + Quiz 1 | | |Apr. 12|SP：Loaders and Linkers (1/2) | {{:member:jay:course:sp:sp2010_ch03.pdf|PDF}}| |Apr. 19|SP：Loaders and Linkers (2/2) | | |Apr. 26|Midterm | | |May 3|OS：Operating System Overview | {{:member:jay:course:sp:os2010_ch01-03.pdf|PDF}}| |May 10|OS：Processes | {{:member:jay:course:sp:os2010_ch04.pdf|PDF}}| |May 17|OS：Threads | {{:member:jay:course:sp:os2010_ch05.pdf|PDF}}| |May 24|OS：CPU Scheduling | {{:member:jay:course:sp:os2010_ch06.pdf|PDF}}| |May 24|OS：Process Synchronizaiton | {{:member:jay:course:sp:os2010_ch07.pdf|PDF}}| |May 31|OS：Deadlocks + Quiz 2 | {{:member:jay:course:sp:os2010_ch08.pdf|PDF}} | |Jun. 7|OS：Memory Management | {{:member:jay:course:sp:os2010_ch09-10.pdf|PDF}}| |Jun. 14|OS：Virtual Memory | | |Jun. 21|Final | | \\ \\ ====== e-Learning ====== ---- ==== UC Berkeley ==== * Webcast.Berkeley [[http://webcast.berkeley.edu/|Website]] * Introduction to Embedded Systems, Edward A. Lee, Fall 2014 [[http://chess.eecs.berkeley.edu/eecs149/lectures/index.html|Slides]] [[http://webcast.berkeley.edu/playlist#c,d,Electrical_Engineering,-XXv-cvA_iDq3FCoYLeUL-X-NUlT405n|Video]] ==== Carnegie Mellon University ==== * Computer Architecture, Prof. Onur Mutlu, Fall 2013 [[http://www.ece.cmu.edu/~ece740/f13/doku.php?id=schedule|Slides & Video]]