//**請GPU組成員協助編輯**// \\ \\ \\ ====== GPGPU架構設計 ====== GPGPU提供可大量平行化(Massive Parallel)的編程模型(Programming Model)，讓易於平行化的應用程式能獲得效能上的躍進，而在硬體架構方面， GPGPU的運算單元為SIMT架構，相較於MIMD架構的處理器，SIMT架構因資料流的單調性更能在相同製程條件下提供遠大於MIMD的運算單元數量，在運算效能極限方面佔有絕對優勢。 \\ ===== 研究主題 ===== 本團隊目前的研究主題如下： ====GPGPU 架構設計 ==== 隨著大量應用產品與需求的出現，繪圖引擎近來擔任大量平行運算的重要角色。本實驗室GPU團隊現在正積極地在開發符合OpenCL/TensorFlow API規範的終端人工智慧Edge-AI之處理器系統，在GPGPU基礎上進行優化設計，並發展人工智慧多線程應用程式的執行環境。 \\ {{ :group:gpgpu.png?350}} \\ - **CASLAB GPUsim** \\ To overcome the complex development process, adopting TLM methodology can build the system by incremental development process, which makes verification and validation in early development stage possible.\\ \\ We develop the cycle-accurate SIMT core by basic cycle-accurate modeling approach and evaluate its performance on CASLAB-GPUSim cosimulation platform. \\ ==== 支援異質系統架構(HSA)之Unified Shader GPU架構設計 ==== (Unified Shader GPU Architecture based on HSA) 隨著GPU技術的進步與繪圖效能的提升，視覺運算領域正快速的發展。使用GPU來做大量平行處理的通用運算GPU(GPGPU - General Purpose GPU)，以及整合CPU與GPU的異質性系統，不但大幅提升了運算效能，更是研究的趨勢之一。[[http://www.hsafoundation.com/|HSA Foundation]]所提出的異質運算系統架構(Heterogeneous System Architecture)，便希望整合CPU與GPU的架構，進一步提升整個系統運算的效能。 \\ {{ :group:HSA_lab.png?250}} === 異質系統架構 === - **HSA Immediate Language** \\ HSA introduced a low-level intermediate language, which is portable across multiple platforms. - **Hetergeneous Uniform Memory Access (hUMA)** \\ Unified Memory Address Space reduces memory bandwidth between CPU and GPU to improve performance. - **Hetergeneous Queuing (hQ)** \\ GPU and CPU have equal flexibility to create and dispatch work items which reduces dispatch latency to GPU. \\ ===== 研究成果 ===== {{ :group:HSA_Sim_lab.png?250}} 為了研究並且模擬異質系統架構的運算，我們實作了一個基於異質系統架構(HSA)的GPU模擬器。此模擬器包含： \\ - **Custom GPU ISA** \\ Which is based on the HSAIL BRIG and Nvidia PTX Virtual ISA - **HSAIL to HSA Binary Translator** - **GPU Simulator** A fundamental GPU Simulator based on our Custom GPU ISA which includes fixed-size register file, warp scheduler, dispatch unit and SIMD execution units for parallel computing. The Simulator also supports 80 of 110 (73%) instructions, and solution to the divergent control flow and synchronization. \\ ===== 團隊成員 ===== ==== 現任成員 ==== ^ 碩士班二年級 | | ^ 碩士班一年級 | | ^ 大學部 || \\ ===== 研究計畫 ===== \\ ===== 外部連結 ===== - [[http://www.hsafoundation.com/|HSA Foundation]] \\ {{tabinclude>tab:research|研究成果, *tab:group|研究群組, tab:member|實驗室成員, tab:course|課程}}